Science & Technology

DLI Scheme: Semiconductor Ecosystem, C-DAC & Startup Incentives

DLI Scheme: Semiconductor Ecosystem, C-DAC & Startup Incentives

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As India pursues self‑reliance in electronics, the government’s Design Linked Incentive (DLI) scheme remains central to nurturing domestic semiconductor design. Launched in December 2021 for a three‑year window, it has already supported two dozen projects and attracted numerous start‑ups. Understanding the scheme’s structure helps innovators access its benefits.

Background

The DLI scheme forms part of the Semicon India Programme to transform India into a hub for chip design and manufacturing. Administered by the Ministry of Electronics and Information Technology, it offers financial incentives and access to design infrastructure. The Centre for Development of Advanced Computing (C‑DAC) implements the programme through a national grid of electronic design automation (EDA) tools and IP core libraries. Domestic companies, start‑ups and micro, small and medium enterprises engaged in semiconductor design are eligible to apply.

Financial support

  • Reimbursement of expenses: Applicants can recover up to 50 percent of eligible expenditure on integrated circuit and system design, capped at ₹15 crore per application. This covers costs such as software licences, IP acquisition and fabrication of prototypes.
  • Sales‑based incentive: Once designs are successfully deployed in electronic products, companies receive incentives ranging from 6 percent to 4 percent of net sales turnover for five years, subject to a ₹30 crore cap. MSMEs and start‑ups must maintain at least 51 percent Indian ownership.
  • Design infrastructure: Through C‑DAC, the scheme provides access to a national EDA grid, a repository of reusable IP cores, multi‑project wafer (MPW) prototyping and post‑silicon validation facilities. This support lowers entry barriers for small design houses.

Achievements so far

  • Project pipeline: As of mid‑2026, the DLI scheme has approved 24 design proposals covering applications in video surveillance, drone detection, energy metering, mixed‑signal processors and microcontrollers.
  • Innovation ecosystem: The national EDA grid supports about one lakh engineers. Some 95 start‑ups and 305 academic institutions access design tools through the programme.
  • Outputs: Supported designers have achieved 16 tape‑outs, produced 6 application‑specific integrated circuits (ASICs), filed 10 patents and created more than 140 reusable semiconductor IP cores. Over 1,000 engineers have been trained.

Conclusion

The DLI scheme is a key stepping‑stone toward a self‑sufficient semiconductor ecosystem. By subsidising design costs and providing infrastructure, it encourages Indian companies to innovate rather than rely solely on imported chips. Sustained funding, timely disbursal and industry‑academia collaboration will determine whether India can turn design success into a thriving manufacturing base.

Sources

DD News

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1.

The Design Linked Incentive (DLI) scheme for semiconductor design is administered by which one of the following Union ministries?

2.

Which one of the following implements the Design Linked Incentive scheme and provides its national grid of electronic design automation tools?

3.

With reference to the Design Linked Incentive (DLI) scheme, consider the following statements:

1.It forms part of the Semicon India Programme.
2.Domestic start-ups and MSMEs engaged in chip design are eligible.
3.It provides capital subsidy for setting up semiconductor fabrication plants.

Select the answer using the code given below:

4.

In the semiconductor industry, electronic design automation (EDA) tools are:

5.

In chip development, the term 'tape-out' refers to the stage at which:

Answer all 5 questions, then submit.
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